View LT3508EFEPBF_4785753.PDF datasheet online --- IC-ON-LINE

Datasheet File OCR Text:

lt3508 1 3508fd typical application features applications description dual monolithic 1.4a step-down switching regulator the lt ? 3508 is a dual current mode pwm step-down dc/dc converter with internal power switches capable of generating two 1.4a outputs. the wide input voltage range of 3.7v to 36v makes the lt3508 suitable for regulating power from a wide variety of sources, including automo- tive batteries, 24v industrial supplies and unregulated wall adapters. both converters are synchronized to a single os- cillator programmable up to 2.5mhz and run with opposite phases, reducing input ripple current. its high operating frequency allows the use of small, low cost inductors and ceramic capacitors, resulting in low, predictable output ripple. each regulator has independent tracking and soft- start circuits and generates a power good signal when its output is in regulation, easing power supply sequencing and interfacing with microcontrollers and dsps. cycle-by-cycle current limit, frequency foldback and ther- mal shutdown provide protection against shorted outputs, and soft-start eliminates input current surge during start- up. the low current (<2a) shutdown mode enables easy power management in battery-powered systems. 3.3v and 5v dual output step-down converter with output sequencing n wide input voltage range: 3.7v to 36v n two 1.4a output switching regulators with internal power switches n adjustable 250khz to 2.5mhz switching frequency n synchronizable over the full frequency range n anti-phase switching reduces ripple n uses small inductors and ceramic capacitors n accurate programmable undervoltage lockout n independent tracking, soft-start and power good circuits ease supply sequencing n output adjustable down to 800mv n small 4mm 4mm 24-pin qfn or 16-pin thermally enhanced tssop surface mount packages n automotive n dsp power supplies n wall transformer regulation n dsl and cable modems n pci express load current (a) 0 65 efficiency (%) 70 75 80 85 95 0.5 1 3508 ta01b 1.5 90 v in = 12v v out2 = 5v v out1 = 3.3v ef? ciency l , lt, ltc, ltm, linear technology and the linear logo are registered trademarks and no r sense is a trademark of linear technology corporation. all other trademarks are the property of their respective owners. v in 5.6v to 36v boost2 lt3508 v in1 v in2 shdn gnd 3508 ta01a rt/sync 100pf 10f 22f 4.7f 0.22f 0.22f on off 43k 150pf 51k 10.7k 52.3k f sw = 700khz 35.7k 100k 56.2k 11.5k 10h 6.8h power good out2 5v 1.4a out1 3.3v 1.4a 1nf boost1 sw2 sw1 fb2 fb1 v c2 pg1 v c1 track/ss1 pg2 track/ss2
lt3508 2 3508fd pin configuration absolute maximum ratings v in pin voltage ............................................(C0.3v), 40v boost pin voltage ...................................................60v boost above sw voltage ........................................30v shdn , pg voltage .....................................................40v track/ss, fb, rt/sync, v c voltage ..........................6v operating junction temperature range (note 2) lt3508e ............................................. C40c to 125c lt3508i .............................................. C40c to 125c lt3508h ............................................ C40c to 150c (notes 1, 7) fe package 16-lead plastic tssop 1 2 3 4 5 6 7 8 top view 16 15 14 13 12 11 10 9 track/ss1 boost1 sw1 v in1 v in2 sw2 boost2 track/ss2 fb1 v c1 pg1 rt/sync shdn pg2 v c2 fb2 17 gnd ja = 40c/w, jc = 10c/w exposed pad (pin 17) is gnd and must be soldered to pcb 24 23 22 21 20 19 7 8 9 top view 25 gnd uf package 24-lead (4mm 4mm) plastic qfn 10 11 12 6 5 4 3 2 1 13 14 15 16 17 18 fb1 track/ss1 gnd gnd gnd gnd fb2 track/ss2 gnd gnd gnd gnd v c1 pg1 rt/sync shdn pg2 v c2 boost1 sw1 v in1 v in2 sw2 boost2 ja = 40c/w, jc = 10c/w exposed pad (pin 25) is gnd and must be soldered to pcb storage temperature range qfn .................................................... C65c to 150c tssop ............................................... C65c to 150c lead temperature (soldering, 10 sec) tssop .............................................................. 300c order information lead free finish tape and reel part marking* package description temperature range lt3508efe#pbf lt3508efe#trpbf 3508fe 16-lead plastic tssop C40c to 125c lt3508ife#pbf lt3508ife#trpbf 3508fe 16-lead plastic tssop C40c to 125c lt3508hfe#pbf lt3508hfe#trpbf 3508hfe 16-lead plastic tssop C40c to 150c lt3508euf#pbf lt3508euf#trpbf 3508 24-lead (4mm 4mm) plastic qfn C40c to 125c lt3508iuf#pbf lt3508iuf#trpbf 3508 24-lead (4mm 4mm) plastic qfn C40c to 125c lt3508huf#pbf lt3508huf#trpbf 3508h 24-lead (4mm 4mm) plastic qfn C40c to 150c consult ltc marketing for parts speci? ed with wider operating temperature ranges.*temperature grades are identi? ed by a label on the shipping container. consult ltc marketing for information on non-standard lead based ? nish parts. for more information on lead free part marking, go to: http://www.linear.com/leadfree/ for more information on tape and reel speci? cations, go to: http://www.linear.com/tapeandreel/
lt3508 3 3508fd electrical characteristics the l denotes the speci? cations which apply over the full operating temperature range, otherwise speci? cations are at t a = 25c. v in = 12v unless otherwise noted. (note 2) note 1: stresses beyond those listed under absolute maximum ratings may cause permanent damage to the device. exposure to any absolute maximum rating condition for extended periods may affect device reliability and lifetime. note 2: the lt3508e is guaranteed to meet performance speci? cations from 0c to 125c junction temperature. speci? cations over the C40c to 125c operating junction temperature range are assured by design, characterization and correlation with statistical process controls. the lt3508i is guaranteed over the full C40c to 125c operating junction temperature range. the lt3508h is guaranteed over the full C40c to 150c operating junction temperature range. high junction temperatures degrade operating lifetimes. operating lifetime is derated at junction temperatures greater than 125c. note 3: current ? ows out of pin. note 4: v boost =12v. circuitry increases the maximum duty cycle of the lt3508 when v boost > v in + 2.5v. see minimum operating voltage in the applications information section for details. note 5: current limit is guaranteed by design and/or correlation to static test. slope compensation reduces current limit at higher duty cycles. note 6: current ? ows into pin. note 7: this ic includes overtemperature protection that is intended to protect the device during momentary overload conditions. junction temperature will exceed the maximum operating junction temperature range when overtemperature protection is active. continuous operation above the speci? ed maximum operating junction temperature may impair device reliability. parameter conditions min typ max units minimum operating voltage, v in1 l 3.4 3.7 v minimum operating voltage, v in2 v in1 = 12v l 2.5 3.0 v v in1 quiescent current not switching 4.3 5.2 ma v in2 quiescent current not switching 320 500 a shutdown current (v in1 + v in2 )v shdn = 0.3v 0.1 2 a fb voltage l 0.790 0.784 0.800 0.814 0.816 v v fb pin bias current (note 3) v fb = 0.800v, v c = 0.5v l 50 300 na fb voltage line regulation 5v < v in < 40v 0.01 %/v error amp transconductance 300 s error amp voltage gain 600 v/v v c to switch current gain 2.5 a/v switching frequency r t = 33.2k l 0.92 1 1.06 mhz switching phase r t = 33.2k 150 180 210 deg maximum duty cycle (note 4) r t = 33.2k r t = 7.50k r t = 169k l 84 90 80 98 % % % foldback frequency r t = 33.2k, v fb = 0v 120 khz switch current limit (note 5) duty cycle = 15% l 2.0 2.6 3.2 a switch v cesat i sw = 1.5a 300 mv switch leakage current 0.01 1 a minimum boost voltage 1.7 2.5 v boost pin current i sw = 1.5a, v boost = 17v 35 50 ma track/ss pin current v track/ss = 0v 0.8 1.2 2.2 a pg threshold offset v fb rising 56 75 110 mv pg voltage output low v fb = 0.6v, i pg = 250a 0.13 0.4 v pg pin leakage v pg = 2v 0.01 1 a shdn threshold voltage 2.53 2.63 2.73 v shdn input current (note 6) v shdn = 60mv above threshold voltage 6 8 10 a shdn threshold current hysteresis 5.5 7.5 9.5 a sync threshold voltage 1 1.25 1.5 v sync input frequency 0.25 2.5 mhz
lt3508 4 3508fd temperature (c) C50 0.790 feedback voltage (v) 0.795 0.800 0.805 0.810 C25 0 25 50 3508 g04 75 100 125 150 temperature (c) current limit (a) 2.0 2.5 3.0 3508 g05 1.5 1.0 0.5 0 C50 C25 0 25 50 75 100 125 150 C50 C25 0 25 50 75 100 125 150 temperature (c) switching frequency (mhz) 0.8 1.0 1.2 3508 g08 0.6 0.4 0.2 0 r t = 33.2k feedback voltage (mv) 0 0 switching frequency (mhz) 0.5 1.0 1.5 2.0 200 400 600 800 3508 g09 2.5 3.0 100 300 500 700 t a = 25c r t = 7.50k r t = 33.2k r t = 169k typical performance characteristics ef? ciency, v out = 5v ef? ciency, v out = 3.3v ef? ciency, v out = 1.8v feedback voltage switch current limit vs temperature switch current limit vs duty cycle switching frequency vs r t switching frequency vs temperature switching frequency foldback load current (a) 0 65 efficiency (%) 70 75 80 85 95 0.5 1 3508 g01 1.5 90 t a = 25c f = 700khz v in = 12v v in = 24v v in = 32v load current (a) 0 65 60 efficiency (%) 70 75 80 85 0.5 1 3508 g02 1.5 90 t a = 25c f = 700khz v in = 12v v in = 24v v in = 32v load current (a) 0 55 efficiency (%) 60 65 70 75 85 0.5 1 3508 g03 1.5 80 t a = 25c f = 1mhz v in = 3.3v v in = 5v v in = 12v duty cycle (%) 0 0 current limit (a) 0.5 1.0 1.5 2.0 2.5 3.0 20 40 60 80 3508 g06 100 t a = 25c typical minimum frequency (mhz) 0 0 r t (k) 50 100 125 150 175 75 25 2.5 2.0 1.5 1.0 0.5 3508 g07 t a = 25c
lt3508 5 3508fd C50 C25 0 25 50 75 100 125 150 temperature (c) 20 25 35 3508 g12 15 10 5 0 30 output current (a) sinking sourcing C50 C25 0 25 50 75 100 125 150 temperature (c) input voltage (v) 3.5 3508 g16 2.0 1.0 0.5 0 4.0 3.0 2.5 1.5 v in1 v in2 typical performance characteristics quiescent current v c voltages error amp output current switch voltage drop boost pin current undervoltage lockout shdn pin current input voltage (v) 0 0 input current (ma) 0.5 1.5 2.0 2.5 5.0 3.5 10 20 25 3508 g10 1.0 4.0 4.5 3.0 515 30 35 40 t a = 25c v in1 v in2 C50 C25 0 25 50 75 100 125 150 temperature (c) 0 v c voltage (v) 1.0 2.5 3508 g11 0.5 2.0 1.5 clamp voltage to switch switch current (a) 0 350 300 250 200 150 100 50 0 3508 g13 0.5 1 1.5 switch voltage (mv) t a = 25c switch current (a) 0 35 30 25 20 15 10 5 0 3508 g14 0.5 1 1.5 boost pin current (ma) t a = 25c shdn pin voltage (v) 0 0 shdn pin current (a) 20 40 60 80 10 20 30 40 3508 g15 100 120 515 25 35 t a = C45c t a = 125c t a = 25c
lt3508 6 3508fd pin functions boost1, boost2: the boost pins are used to provide drive voltages, higher than the input voltage, to the internal npn power switches. tie through a diode to a 2.8v or higher supply, such as v out or v in . exposed pad: the exposed pad metal of the package pro- vides both electrical contact to ground and good thermal contact to the printed circuit board. the exposed pad must be soldered to the circuit board for proper operation. fb1, fb2: the lt3508 regulates each feedback pin to 0.800v. connect the feedback resistor divider taps to these pins. gnd: tie the gnd pins directly to the exposed pad and ground plane. pg1, pg2: the power good pins are the open-collector outputs of an internal comparator. pg remains low until the fb pin is within 10% of the ? nal regulation voltage. as well as indicating output regulation, the pg pins can be used to sequence the two switching regulators. these pins can be left unconnected. the pg outputs are valid when v in1 is greater than 3.7v and shdn is high. the pg comparators are disabled in shutdown. rt/sync: the rt/sync pin is used to set the internal oscillator frequency. tie a 33.2k resistor from rt/sync to gnd for a 1mhz switching frequency. to synchronize the part to an external frequency, drive the rt/sync pin with a logic-level signal with positive and negative pulse widths of at least 80ns. shdn : the shutdown pin is used to put the lt3508 in shutdown mode. pull the pin below 0.3v to shut down the lt3508. the 2.63v threshold can function as an accurate undervoltage lockout (uvlo), preventing the regulator from operating until the input voltage has reached the programmed level. do not drive shdn more than 6v above v in1 . sw1, sw2: the sw pins are the outputs of the internal power switches. connect these pins to the inductors, catch diodes and boost capacitors. track/ss1, track/ss2: the track/ss pins are used to soft-start the two channels, to allow one channel to track the other output, or to allow both channels to track another output. for tracking, tie a resistor divider to this pin from the tracked output. for soft-start, tie a capacitor to this pin. an internal 1.2a soft-start current charges the capacitor to create a voltage ramp at the pin. in the tssop package, if these pins are unused, tie a 47pf or greater capacitor from each pin to gnd. v c1 , v c2 : the v c pins are the outputs of the internal error amps. the voltages on these pins control the peak switch currents. these pins are normally used to compensate the control loops, but can also be used to override the loops. pull these pins to ground with an open drain to shut down each switching regulator separately. v in1 : the v in1 pin supplies current to the lt3508 internal circuitry and to the internal power switch connected to sw1 and must be locally bypassed. v in1 must be greater than 3.7v for channel 1 or channel 2 to operate. if v in1 is greater than 3.7v, channel 2 can operate with v in2 as low as 3v. v in2 : the v in2 pin supplies current to the internal power switch connected to sw2 and must be locally bypassed. connect this pin directly to v in1 unless power for chan- nel 2 is coming from a different source. v in2 must be greater than 3v and v in1 must be greater than 3.7v for channel 2 to operate.
lt3508 7 3508fd block diagram figure 1. block diagram of the lt3508 with associated external components (one of two switching regulators shown) C + C + + C + C + r sq slave osc int reg and ref master osc track/ss 1.2a clk1 clk2 v in1 shdn 0.80v track/ss 75mv i limit clamp pg c c c f r c gnd error amp slope v c 0.75v 0.625v clk r1 c1 c in sw fb boost v in rt/sync v in d2 c3 l1 d1 c1 r2 out 3508 f01 + +
lt3508 8 3508fd operation the lt3508 is a dual constant frequency, current mode regulator with internal power switches. operation can be best understood by referring to the block diagram. if the shdn pin is tied to ground, the lt3508 is shut down and draws minimal current from the input source tied to the v in pins. if the shdn pin exceeds 1v, the internal bias circuits turn on, including the internal regulator, reference and oscillator. the switching regulators will only begin to operate when the shdn pin exceeds 2.63v. the switcher is a current mode regulator. instead of directly modulating the duty cycle of the power switch, the feedback loop controls the peak current in the switch during each cycle. compared to voltage mode control, current mode control improves loop dynamics and provides cycle-by- cycle current limit. a pulse from the oscillator sets the rs ? ip-? op and turns on the internal npn power switch. current in the switch and the external inductor begins to increase. when this current exceeds a level determined by the voltage at v c , current comparator c1 resets the ? ip-? op, turning off the switch. the current in the inductor ? ows through the external schottky diode and begins to decrease. the cycle begins again at the next pulse from the oscillator. in this way, the voltage on the v c pin controls the current through the inductor to the output. the internal error ampli? er regulates the output current by continually adjusting the v c pin voltage. the threshold for switching on the v c pin is 0.8v, and an active clamp of 1.75v limits the output current. the switching frequency is set either by the resistance to gnd at the rt/sync pin or the frequency of the logic-level signal driving the rt/sync pin. a detection circuit monitors for the presence of a sync signal on the pin and switches between the two modes. unique circuitry generates the appropriate slope compensation ramps and generates the 180 out-of-phase clocks for the two channels. the switching regulator performs frequency foldback during overload conditions. an ampli? er senses when v fb is less than 0.625v and begins decreasing the oscil- lator frequency down from full frequency to 12% of the nominal frequency when v fb = 0v. the fb pin is less than 0.8v during start-up, short-circuit and overload conditions. frequency foldback helps limit switch current under these conditions. the switch driver operates either from v in or from the boost pin. an external capacitor and schottky diode are used to generate a voltage at the boost pin that is higher than the input supply. this allows the driver to saturate the internal bipolar npn power switch for ef? cient operation. the track/ss pin serves as an alternative input to the error ampli? er. the ampli? er will use the lowest voltage of either the reference of 0.8v or the voltage on the track/ ss pin as the positive input of error ampli? er. since the track/ss pin is driven by a constant current source, a single capacitor on the pin will generate a linear ramp on the output voltage. tying the track/ss pin to a resistor divider from the output of one of the switching regulators allows one output to track another. the pg output is an open-collector transistor that is off when the output is in regulation, allowing an external re- sistor to pull the pg pin high. power good is valid when the lt3508 is enabled ( shdn is high) and v in1 is greater than 3.7v.
lt3508 9 3508fd applications information setting the output voltage the output voltage is programmed with a resistor divider between the output and the fb pin. choose the 1% resis- tors according to: r1 = r2 v out 0.8v C1 ? ? ? ? ? ? r2 should be 20k or less to avoid bias current errors. reference designators refer to the block diagram. minimum operating voltage the minimum operating voltage is determined either by the lt3508s undervoltage lockout or by its maximum duty cycle. if v in1 and v in2 are tied together, the undervoltage lockout is at 3.7v or below. if the two inputs are used separately, then v in1 has an undervoltage lockout of 3.7v or below and v in2 has an undervoltage lockout of 3v or below. because the internal supply runs off v in1 , chan- nel 2 will not operate unless v in1 > 3.7v. the duty cycle is the fraction of time that the internal switch is on and is determined by the input and output voltages: dc = v out + v f v in ?v sw + v f unlike many ? xed frequency regulators, the lt3508 can extend its duty cycle by turning on for multiple cycles. the lt3508 will not switch off at the end of each clock cycle if there is suf? cient voltage across the boost capaci- tor (c3 in figure 1). eventually, the voltage on the boost capacitor falls and requires refreshing. circuitry detects this condition and forces the switch to turn off, allowing the inductor current to charge up the boost capacitor. this places a limitation on the maximum duty cycle as follows: dc max = 1 1 + 1 sw where sw is equal to the sw pin current divided by the boost pin current as shown in the typical performance characteristics section. this leads to a minimum input voltage of: v in(min) = v out + v f dc max ?v f + v sw where v f is the forward voltage drop of the catch diode (~0.4v) and v sw is the voltage drop of the internal switch (~0.4v at maximum load). example: i sw = 1.5a and i boost = 50ma, v out = 3.3v, sw = 1.5a/50ma = 30, dc max = 1/(1+1/30) = 96%: v in(min) = 3.3v + 0.4v 96% ? 0.4v + 0.4v = 3.8v maximum operating voltage the maximum operating voltage is determined by the absolute maximum ratings of the v in and boost pins, and by the minimum duty cycle: dc min = t on(min) ? f where t on(min) is equal to 130ns (for t j > 125c t on(min) is equal to 150ns) and f is the switching frequency. running at a lower switching frequency allows a lower minimum duty cycle. the maximum input voltage before pulse skipping occurs depends on the output voltage and the minimum duty cycle: v in(ps) = v out + v f dc min ?v f + v sw example: f = 790khz, v out = 3.3v, dc min = 130ns ? 790khz = 0.103: v in(ps) = 3.3v + 0.4v 0.103 ? 0.4v + 0.4v = 36v the lt3508 will regulate the output current at input voltages greater than v in(ps) . for example, an application with an output voltage of 1.8v and switching frequency of 1.5mhz has a v in(ps) of 11.3v, as shown in figure 2. figure 3 shows operation at 18v. output ripple and peak inductor current have signi? cantly increased. exceeding v in(ps) is safe if the output is in regulation, if the external components have adequate ratings to handle the peak conditions and if the peak inductor current does not exceed 3.2a. a saturating inductor may further reduce performance. do not exceed v in(ps) during start-up or overload conditions (for outputs greater than 5v, use v out = 5v to calculate v in(ps) ). for operation above 20v in pulse skipping mode, program the switching frequency to 1.1mhz or less.
lt3508 10 3508fd table 1. programming the switching frequency switching frequency (mhz) r t (k ) 2.5 7.50 2.2 9.76 2 11.5 1.8 14 1.6 16.9 1.4 20.5 1.2 26.1 1 33.2 0.9 38.3 0.8 44.2 0.7 52.3 0.6 61.9 0.5 76.8 0.45 88.7 0.4 100 0.35 115 0.3 140 0.25 169 inductor selection and maximum output current a good ? rst choice for the inductor value is: l = v out + v f ( ) ? 1.2h f where v f is the voltage drop of the catch diode (~0.4v) and f is in mhz. the inductors rms current rating must be greater than the maximum load current and its saturation current should be at least 30% higher. for highest ef? ciency, the series resistance (dcr) should be less than 0.1 . table 2 lists several vendors and types that are suitable. table 2. inductor vendors vendor url part series type coilcraft www.coilcraft mss7341 shielded murata www.murata.com lqh55d open tdk www.component.tdk.com slf7045 slf10145 shielded shielded toko www.toko.com dc62cb d63cb d75c d75f shielded shielded shielded open sumida www.sumida.com cr54 cdrh74 cdrh6d38 cr75 open shielded shielded open figure 2. operation below v in(ps) . v in = 10v, v out = 1.8v and f sw = 1.5mhz figure 3. operation above v in(ps) . v in = 18v, v out = 1.8v and f sw = 1.5mhz. output ripple and peak inductor current increase applications information v out 100mv/div (ac) i l 500ma/div 2s/div 3508 f02 v out 100mv/div (ac) i l 500ma/div 2s/div 3508 f03 setting the switching frequency the switching frequency is programmed either by driving the rt/sync pin with a logic level sync signal or by tying a resistor from the rt/sync pin to ground. a graph for selecting the value of r t for a given operating frequency is shown in the typical application section. suggested programming resistors for various switching frequencies are shown in table 1. choosing a high switching frequency will allow the smallest overall solution size. however, at high input voltages the ef? ciency can drop signi? cantly with increasing switching frequency. the choice of switching frequency will also impact the input voltage range, inductor and capacitor selection, and compensation. see the related sections for details.
lt3508 11 3508fd the optimum inductor for a given application may differ from the one indicated by this simple design guide. a larger value inductor provides a higher maximum load current, and reduces the output voltage ripple. if your load is lower than the maximum load current, then you can relax the value of the inductor and operate with higher ripple cur- rent. this allows you to use a physically smaller inductor, or one with a lower dcr resulting in higher ef? ciency. be aware that if the inductance differs from the simple rule above, then the maximum load current will depend on input voltage. in addition, low inductance may result in discontinuous mode operation, which further reduces maximum load current. for details of discontinuous mode operation, see application note 44. finally, for duty cycles greater than 50% (v out /v in > 0.5), a minimum inductance is required to avoid sub-harmonic oscillations: l min = v out + v f ( ) ? 0.8h f where f is in mhz. the current in the inductor is a triangle wave with an average value equal to the load current. the peak switch current is equal to the output current plus half the peak-to-peak inductor ripple current. the lt3508 limits its switch current in order to protect itself and the system from overload faults. therefore, the maximum output current that the lt3508 will deliver depends on the switch current limit, the inductor value, and the input and output voltages. when the switch is off, the potential across the inductor is the output voltage plus the catch diode drop. this gives the peak-to-peak ripple current in the inductor: i l = 1? dc ( ) v out + v f ( ) l?f where f is the switching frequency of the lt3508 and l is the value of the inductor. the peak inductor and switch current is: i sw(pk) = i l(pk) = i out + i l 2 to maintain output regulation, this peak current must be less than the lt3508s switch current limit i lim . i lim is at least 2a for at low duty cycles and decreases linearly to 1.55a at dc = 90%. the maximum output current is a function of the chosen inductor value: i out(max) = i lim ? i l 2 = 2a ? 1? 0.25 ? dc ( ) ? i l 2 choosing an inductor value so that the ripple current is small will allow a maximum output current near the switch current limit. one approach to choosing the inductor is to start with the simple rule given above, look at the available inductors, and choose one to meet cost or space goals. then use these equations to check that the lt3508 will be able to deliver the required output current. note again that these equations assume that the inductor current is continuous. discontinu- ous operation occurs when i out is less than ? i l /2. input capacitor selection bypass the v in pins of the lt3508 circuit with a ceramic capacitor of x7r or x5r type. for switching frequen- cies above 500khz, use a 4.7f capacitor or greater. for switching frequencies below 500khz, use a 10f or higher capacitor. if the v in pins are tied together only a single capacitor is necessary. if the v in pins are separated, each pin will need its own bypass. the following paragraphs describe the input capacitor considerations in more detail. step-down regulators draw current from the input supply in pulses with very fast rise and fall times. the input ca- pacitor is required to reduce the resulting voltage ripple at the lt3508 input and to force this switching current into a tight local loop, minimizing emi. the input capacitor must have low impedance at the switching frequency to do this effectively, and it must have an adequate ripple current rating. with two switchers operating at the same frequency but with different phases and duty cycles, calculating the input capacitor rms current is not simple. however, a conservative value is the rms input current for the channel that is delivering most power (v out times i out ): i c in(rms) = i out ? v out v in ?v out ( ) v in < i out 2 and is largest when v in = 2v out (50% duty cycle). as the second, lower power channel draws input current, applications information
lt3508 12 3508fd the input capacitors rms current actually decreases as the out-of-phase current cancels the current drawn by the higher power channel. considering that the maximum load current from a single channel is ~1.4a, rms ripple current will always be less than 0.7a. the high frequency of the lt3508 reduces the energy stor- age requirements of the input capacitor. the combination of small size and low impedance (low equivalent series resistance or esr) of ceramic capacitors makes them the preferred choice. the low esr results in very low voltage ripple. ceramic capacitors can handle larger magnitudes of ripple current than other capacitor types of the same value. use x5r and x7r types. an alternative to a high value ceramic capacitor is a lower value ceramic along with a larger electrolytic capacitor. the electrolytic capacitor likely needs to be greater than 10f in order to meet the esr and ripple current requirements. the input capacitor is likely to see high surge currents when the input source is applied. tantalum capacitors can fail due to an oversurge of current. only use tantalum capacitors with the appropriate surge current rating. the manufacturer may also recommend operation below the rated voltage of the capacitor. a ? nal caution is in order regarding the use of ceramic capacitors at the input. a ceramic input capacitor can combine with stray inductance to form a resonant tank circuit. if power is applied quickly (for example by plugging the circuit into a live power source), this tank can ring, doubling the input voltage and damaging the lt3508. the solution is to either clamp the input voltage or dampen the tank circuit by adding a lossy capacitor in parallel with the ceramic capacitor. for details see application note 88. output capacitor selection the output capacitor has two essential functions. along with the inductor, it ? lters the square wave generated by the lt3508 to produce the dc output. in this role it determines the output ripple, and low impedance at the switching frequency is important. the second function is to store energy in order to satisfy transient loads and stabilize the lt3508s control loop. ceramic capacitors have very low equivalent series resistance (esr) and provide the best ripple performance. a good value is: c out = 50v v out ? 1m h z f where c out is in f. use x5r or x7r types. this choice will provide low output ripple and good transient response. transient performance can be improved with a high value capacitor if the compensation network is also adjusted to maintain the loop bandwidth. a lower value of output capaci- tor can be used, but transient performance will suffer. with an external compensation network, the loop gain can be lowered to compensate for the lower capacitor value. look carefully at the capacitors data sheet to ? nd out what the actual capacitance is under operating conditions (applied voltage and temperature). a physically larger capacitor, or one with a higher voltage rating, may be required. high performance electrolytic capacitors can be used for the output capacitor. low esr is important, so choose one that is intended for use in switching regulators. the esr should be speci? ed by the supplier, and should be 0.05 or less. such a capacitor will be larger than a ceramic capacitor and will have a larger capacitance, because the capacitor must be large to achieve low esr. table 3 lists several capacitor vendors. table 3. capacitor vendors vendor part series comments panasonic ceramic polymer tantalum eef series kemet ceramic tantalum t494, t495 sanyo ceramic polymer tantalum poscap murata ceramic avx ceramic tantalum tps series taiyo yuden ceramic tdk ceramic applications information
lt3508 13 3508fd diode selection the catch diode (d1 from figure 1) conducts current only during switch off time. average forward current in normal operation can be calculated from: i d(avg) = i out v in ?v out ( ) v in the only reason to consider a diode with a larger current rating than necessary for nominal operation is for the worst-case condition of shorted output. the diode cur- rent will then increase to the typical peak switch current. peak reverse voltage is equal to the regulator input voltage. use a diode with a reverse voltage rating greater than the input voltage. table 4 lists several schottky diodes and their manufacturers. if operating at high ambient temperatures, consider using a schottky with low reverse leakage. table 4. schottky diodes part number v r (v) i ave (a) v f at 1a (mv) v f at 2a (mv) on semiconductor mbr0520l 20 0.5 mbr0540 40 0.5 620 mbrm120e 20 1 530 mbrm140 40 1 550 diodes inc. b0530w 30 0.5 b120 20 1 500 b130 30 1 500 b140hb 40 1 dfls140 40 1.1 510 b240 40 2 500 boost pin considerations the capacitor and diode tied to the boost pin generate a voltage that is higher than the input voltage. in most cases, a 0.22f capacitor and fast switching diode (such as the cmdsh-3 or mmsd914lt1) will work well. for ap- plications 1mhz or faster, a 0.1f capacitor is suf? cient. use a 0.47f capacitor or greater for applications running below 500khz. figure 4 shows three ways to arrange the boost circuit. the boost pin must be more than 2.5v above the sw pin for full ef? ciency. for outputs of 3.3v and higher, the standard circuit (figure 4a) is best. for outputs between 2.8v and 3.3v, use a small schottky diode (such as the bat-54). for lower output voltages, the boost diode can be tied to the input (figure 4b). the circuit in figure 4a is more ef? cient because the boost pin current comes from a lower voltage source. finally, the anode of the boost diode can be tied to another source (v aux ) that is at least 3v (figure 4c). for example, if you are generating a 3.3v output, and the 3.3v output is on whenever the particular channel is on, the anode of the boost diode can be connected to the 3.3v output. in any case, be sure that the maximum voltage at the boost pin is both less than 60v and the voltage difference between the boost and sw pins is less than 30v. applications information figure 4. generating the boost voltage v in boost gnd sw v in lt3508 (4a) d2 v out c3 v boost C v sw ? v out max v boost ? v in + v out v in boost gnd sw v in lt3508 (4b) d2 v out c3 v boost C v sw ? v in max v boost ? 2v in d2 v in boost gnd sw v in lt3508 (4c) 3508 f04 v out v boost C v sw ? v aux max v boost ? v aux + v in minimum value for v aux = 3v v aux > 3v c3
lt3508 14 3508fd the minimum operating voltage of an lt3508 applica- tion is limited by the undervoltage lockout (3.7v) and by the maximum duty cycle. the boost circuit also limits the minimum input voltage for proper start-up. if the input voltage ramps slowly, or the lt3508 turns on when the output is already in regulation, the boost capacitor may not be fully charged. because the boost capacitor charges with the energy stored in the inductor, the circuit will rely on some minimum load current to get the boost circuit running properly. this minimum load will depend on input and output voltages, and on the arrangement of the boost circuit. the minimum load current generally goes to zero once the circuit has started. figure 5 shows a plot of minimum load to start and to run as a function of input voltage. even without an output load current, in many cases the discharged output capacitor will present a load to the switcher that will allow it to start. the plots show the worst case, where v in is ramping very slowly. frequency compensation the lt3508 uses current mode control to regulate the output. this simpli? es loop compensation. in particular, the lt3508 does not require the esr of the output capacitor for stability, so you are free to use ceramic capacitors to achieve low output ripple and small circuit size. frequency compensation is provided by the components tied to the v c pin, as shown in figure 1. generally a capaci- tor (c c ) and a resistor (r c ) in series to ground are used. in addition, there may be a lower value capacitor in parallel. this capacitor (c f ) is not part of the loop compensation but is used to ? lter noise at the switching frequency, and is required only if a phase-lead capacitor is used or if the output capacitor has high esr. loop compensation determines the stability and transient performance. designing the compensation network is a bit complicated and the best values depend on the application and in particular the type of output capacitor. a practical approach is to start with one of the circuits in this data sheet that is similar to your application and tune the com- pensation network to optimize the performance. stability should then be checked across all operating conditions, including load current, input voltage and temperature. the lt1375 data sheet contains a more thorough discussion of loop compensation and describes how to test the stability using a transient load. figure 6 shows an equivalent circuit for the lt3508 control loop. the error ampli? er is a transconductance ampli? er with ? nite output impedance. the power section, consisting of the modulator, power switch and inductor, is modeled as a transconductance ampli? er generating an output current proportional to the voltage at the v c pin. note that the output capacitor integrates this current, and that the capacitor on the v c pin (c c ) integrates the error ampli? er output current, resulting in two poles in the loop. in most cases a zero is required and comes from either the output capacitor esr or from a resistor r c in series with c c . this simple model works well as long as the value of the inductor is not too high and the loop crossover frequency applications information figure 5. the minimum input voltage depends on output voltage, load current and boost circuit load current (ma) 1 5.0 5.5 6.5 1000 3508 f05a 4.5 4.0 10 100 10000 3.5 3.0 6.0 input voltage (v) t a = 25c v out = 3.3v to start to run load current (ma) 1 input voltage (v) 6 7 10000 3508 g05b 5 4 10 100 1000 9 8 t a = 25c v out = 5v to start to run minimum input voltage, v out = 3.3v minimum input voltage, v out = 5v
lt3508 15 3508fd shutdown and undervoltage lockout figure 7 shows how to add undervoltage lockout (uvlo) to the lt3508. typically, uvlo is used in situations where the input supply is current limited, or has a relatively high source resistance. a switching regulator draws constant power from the source, so source current increases as source voltage drops. this looks like a negative resistance load to the source and can cause the source to current limit or latch low under low source voltage conditions. uvlo prevents the regulator from operating at source voltages where the problems might occur. an internal comparator will force the part into shutdown below the minimum v in1 of 3.7v. this feature can be used to prevent excessive discharge of battery-operated systems. is much lower than the switching frequency. a phase-lead capacitor (c pl ) across the feedback divider may improve the transient response. if an adjustable uvlo threshold is required, the shdn pin can be used. the threshold voltage of the shdn pin comparator is 2.63v. current hysteresis is added above the shdn threshold. this can be used to set voltage hysteresis of the uvlo using the following: r3 = v h ?v l 7.5a r4 = 2.63v v l ? 2.63v r3 ?8a example: switching should not start until the input is above 4.75v and is to stop if the input falls below 4v. v h = 4.75v, v l = 4.0v r3 = 4.75v ? 4v 7.5a = 100k r4 = 2.63v 4v ? 2.63v 100k ?8a = 461k keep the connection from the resistor to the shdn pin short and make sure the interplane or surface capacitance to switching nodes is minimized. if high resistor values are used, the shdn pin should be bypassed with a 1nf capaci- tor to prevent coupling problems from the switch node. soft-start the output of the lt3508 regulates to the lowest voltage present at either the track/ss pin or an internal 0.8v reference. a capacitor from the track/ss pin to ground is charged by an internal 1.2a current source resulting in a linear output ramp from 0v to the regulated output whose duration is given by: t ramp = c ss ? 0.8v 1.2a at power up, internal open-collector outputs discharge both track/ss pins. the pins clamp at 1.3v. applications information C + 0.8v v sw v c lt3508 gnd 3508 f06 r1 output esr c f c c r c 2m error amplifier fb r2 c1 c1 current mode power stage g m = 2.5s g m = 300s + polymer or tantalum ceramic c pl figure 6. model for loop response figure 7. undervoltage lockout 2.6v 7.5a 8a r3 r4 c1 shdn lt3508 v in track/ss v c 3508 f07 C +
lt3508 16 3508fd applications information track/ss1 (8a) lt3508 20ms/div v out1 1v/div 20ms/div 1v/div 20ms/div 1v/div v out2 track/ss2 0.1f 0.047f 3.3v 5v track/ss1 (8b) lt3508 v out1 v out2 track/ss2 0.22f 3.3v 5v track/ss1 (8e) lt3508 v out1 v out2 track/ss2 3.3v 5v r1 28.7k r2 10.0k independent start-up ratiometric start-up coincident start-up track/ss1 (8d) lt3508 v out1 pg1 v out2 track/ss2 0.1f 0.047f 3.3v 5v external source output sequencing controlled power up and down + C track/ss1 (8c) lt3508 v out1 v out2 track/ss2 0.1f 3.3v 5v r1 28.7k r2 10.0k v out1 v out1 v out2 v out2 v out1 v out2 20ms/div 1v/div 20ms/div 1v/div v out1 v out2 v out1 v out2 external source figure 8 output tracking and sequencing complex output tracking and sequencing between channels can be implemented using the lt3508s track/ss and pg pins. figure 8 shows several con? gurations for output tracking and sequencing of 5v and 3.3v applications. independent soft-start for each channel is shown in fig- ure 8a. the output ramp time for each channel is set by the soft-start capacitor as described in the soft-start section.
lt3508 17 3508fd ratiometric tracking is achieved in figure 8b by connecting both the track/ss pins together. in this con? guration the track/ss pin source current is doubled (2.4a) which must be taken into account when calculating the output rise time. do not tie track/ss1 and track/ss2 together if using multiple inputs. if v in2 is below 3v, track/ss2 pulls low and would hold track/ss1 low as well if the two pins are tied together, which would prevent channel 1 from operating. by connecting a feedback network from v out1 to the track/ss2 pin with the same ratio that set the v out2 voltage, absolute tracking shown in figure 8c is imple- mented. a small v out2 voltage offset will be present due to the track/ss2 1.2a source current. this offset can be corrected for by slightly reducing the value of r2. use a resistor divider such that when v out1 is in regulation, track/ss2 is pulled up to 1v or greater. if track/ss is below 1v, the output may regulate fb to a voltage lower than the 800mv reference voltage. figure 8d illustrates output sequencing. when v out1 is within 10% of its regulated voltage, pg1 releases the track/ss2 soft-start pin allowing v out2 to soft-start. in this case pg1 will be pulled up to 1.3v by the track/ ss pin. if precise output ramp up and down is required, drive the track/ss pins as shown in figure 8e. multiple inputs for applications requiring large inductors due to high v in to v out ratios, a 2-stage step down approach may reduce inductor size by allowing an increase in frequency. a dual step-down application (figure 9) steps down the input voltage (v in1 ) to the highest output voltage, then uses that voltage to power the second output (v in2 ). v out1 must be able to provide enough current for its output plus the input current at v in2 when v out2 is at its maximum load. for applications with multiple input voltages, the lt3508 can accommodate input voltages as low as 3v on v in2 . this can be useful in applications regulating outputs from a pci express bus, where the 12v input is power limited and the 3.3v input has power available to drive other outputs. in this case, tie the 12v input to v in1 and the 3.3v input to v in2 . see the typical application section for an example circuit. shorted and reverse input protection if the inductor is chosen so that it wont saturate exces- sively, an lt3508 step-down regulator will tolerate a shorted output. there is another situation to consider in systems where the output will be held high when the input to the applications information figure 9. 1mhz, wide input range 5v and 1.8v outputs v in 5.7v to 36v boost2 lt3508 v in1 v in2 gnd 3508 f09 rt/sync c7 330pf c5 47f c4 10f c1 4.7f c2 0.1f c3 0.1f r6 47k c6 100pf r5 39k r4 15.0k r8 33.2k f sw = 1mhz r1 56.2k r7 100k r2 18.7k r3 10.7k l2 3.3h l1 6.8h d1 d2 out1 d3 d4 power good out2 1.8v 1a out1 5v 0.9a c8 1nf c9 3.3nf boost1 shdn sw2 sw1 fb2 fb1 v c2 pg1 v c1 track/ss1 pg2 track/ss2 on off
lt3508 18 3508fd lt3508 is absent. this may occur in battery charging applications or in battery back-up systems where a battery or some other supply is diode or-ed with the lt3508s output. if the v in pin is allowed to ? oat and the shdn pin is held high (either by a logic signal or because it is tied to v in ), then the lt3508s internal circuitry will pull its quiescent current through its sw pin. this is ? ne if your system can tolerate a few ma in this state. if you ground the shdn pin, the sw pin current will drop to essentially zero. however, if the v in pin is grounded while the output is held high, then parasitic diodes inside the lt3508 can pull large currents from the output through the sw pin and the v in pin. figure 10 shows a circuit that will run only when the input voltage is present and that protects against a shorted or reversed input. applications information figure 11. a good pcb layout ensures proper low emi operation pcb layout for proper operation and minimum emi, care must be taken during printed circuit board layout. figure 11 shows the recommended pcb layout with trace and via locations. note that large, switched currents ? ow in the lt3508s v in and sw pins, the catch diode (d1) and the input capacitor (c in ). the loop formed by these components should be as small as possible. these components, along with the inductor and output capacitor, should be placed on the same side of the circuit board, and their connections should be made on that layer. place a local, unbroken ground plane below these components. the sw and boost nodes should be as small as possible. finally, keep the fb and v c nodes small so that the ground traces will shield them from the sw and boost nodes. the exposed pad on the bottom of the package must be soldered to ground so that the pad acts as a heat sink. to keep thermal resistance low, extend the ground plane as much as possible, and add thermal vias under and near the lt3508 to additional ground planes within the circuit board and on the bottom side. v in v in v out sw lt3508 d4 parasitic diode 3508 f10 figure 10. diode d4 prevents a shorted input from discharging a backup battery tied to the output (11a) example layout for fe16 package (11b) example layout for qfn package
lt3508 19 3508fd high temperature considerations the die temperature of the lt3508 must be lower than the maximum rating of 125c (150c for the h-grade). this is generally not a concern unless the ambient temperature is above 85c. for higher temperatures, care should be taken in the layout of the circuit to ensure good heat sinking of the lt3508. the maximum load current should be derated as the ambient temperature approaches 125c (150c for the h-grade). the die temperature is calculated by multiplying the lt3508 power dissipation by the thermal resistance from junction to ambient. power dissipation within the lt3508 can be estimated by calculating the total power loss from an ef? ciency measurement and subtract- ing the catch diode loss. thermal resistance depends on the layout of the circuit board, but values from 30c/w to 60c/w are typical. die temperature rise was measured on a 4-layer, 6.5cm 7.5cm circuit board in still air at a load current of 1.4a (f sw = 700khz). for a 12v input to 3.3v output the die temperature elevation above ambient was 13c; for 24v in to 3.3v out the rise was 18c; for 12v in to 5v out the rise was 14c and for 24v in to 5v out the rise was 19c. outputs greater than 6v for outputs greater than 6v, add a resistor of 1k to 2.5k across the inductor to damp the discontinuous ringing of the sw node, preventing unintended sw current. the 12v output circuit in the typical applications section shows the location of this resistor. other linear technology publications application notes 19, 35 and 44 contain more detailed descriptions and design information for step-down regu- lators and other switching regulators. the lt1376 data sheet has a more extensive discussion of output ripple, loop compensation and stability testing. design note 318 shows how to generate a dual polarity output supply using a step-down regulator. applications information
lt3508 20 3508fd 3.3v and 5v dual output step-down converter with output sequencing typical applications 1mhz, 3.3v and 1.8v outputs with sequencing v in 3.9v to 16v boost2 lt3508 v in2 v in1 shdn gnd 3508 ta02 rt/sync c7 150pf c5 10f c4 47f c1 4.7f c2 0.1f c3 0.1f on off r6 39k c6 330pf r5 47k r4 11.5k r8 33.2k f sw = 1mhz r1 18.7k r7 100k r2 35.7k r3 15.0k l2 4.7h l1 3.3h d1 d2 d3 d4 power good out2 3.3v 1.4a out1 1.8v 1.4a out2 c8 1nf boost1 sw2 sw1 fb2 fb1 v c2 pg1 v c1 track/ss1 pg2 track/ss2 c1 to c5: x5r or x7r d1, d2: mmsd4148 d3: diodes inc. b140 d4: diodes inc. b240a v in 5.7v to 36v boost2 lt3508 v in2 v in1 shdn gnd 3508 ta03 rt/sync c7 100pf c5 10f c4 22f c1 4.7f c2 0.22f c3 0.22f on off r6 43k c6 150pf r5 51k r4 10.7k r8 52.3k f sw = 700khz r1 35.7k r7 100k r2 56.2k r3 11.5k l2 10h l1 6.8h d1 d2 d3 d4 power good out2 5v 1.4a out1 3.3v 1.4a c8 1nf boost1 sw2 sw1 fb2 fb1 v c2 pg1 v c1 track/ss1 pg2 track/ss2 c1 to c5: x5r or x7r d1, d2: mmsd4148 d3: diodes inc. b140 d4: diodes inc. b240a
lt3508 21 3508fd 1mhz, wide input range 5v and 1.8v outputs typical applications v in 5.7v to 36v boost2 lt3508 v in1 v in2 gnd 3508 ta04 rt/sync c7 330pf c5 47f c4 10f c1 4.7f c2 0.1f c3 0.1f r6 47k c6 100pf r5 39k r4 15.0k r8 33.2k f sw = 1mhz r1 56.2k r7 100k r2 18.7k r3 10.7k l2 3.3h l1 6.8h d1 d2 out1 d3 d4 power good out2 1.8v 1a out1 5v 0.9a c8 1nf c9 3.3nf boost1 shdn sw2 sw1 fb2 fb1 v c2 pg1 v c1 track/ss1 pg2 track/ss2 on off c1 to c5: x5r or x7r d1, d2: mmsd4148 d3: diodes inc. b240a d4: diodes inc. b120
lt3508 22 3508fd typical applications 1mhz, 5v and 12v outputs v in 14v to 36v boost2 lt3508 v in2 v in1 shdn gnd 3508 ta06 rt/sync c7 100pf c5 10f c4 4.7f c1 4.7f c2 0.1f c3 0.1f d4 on off r6 39k c6 100pf r5 43k r7 10.7k r9 33.2k f sw = 1mhz r1 154k r2 1k r8 100k c1 to c5: x5r or x7r d1, d2: mmsd4148 d3: diodes inc. b240a d4: diodes inc. b140 r2: use 0.25w resistor. for continuous operation above 30v, use two 2k, 0.25w resistors in parallel *derate output current at higher ambient temperatures and input voltages to maintain junction temperature below the absolute maximum r3 56.2k r4 11.0k l2 6.8h d2 l1 15h d1 d3 power good out2 5v 1.4a* out1 12v 1.4a* out2 c8 1nf boost1 sw2 sw1 fb2 fb1 v c2 pg1 v c1 track/ss1 pg2 track/ss2
lt3508 23 3508fd fe16 (ba) tssop rev i 0211 0.09 C 0.20 (.0035 C .0079) 0 s C 8 s 0.25 ref 0.50 C 0.75 (.020 C .030) 4.30 C 4.50* (.169 C .177) 134 5 6 7 8 10 9 4.90 C 5.10* (.193 C .201) 16 1514 13 12 11 1.10 (.0433) max 0.05 C 0.15 (.002 C .006) 0.65 (.0256) bsc 2.74 (.108) 2.74 (.108) 0.195 C 0.30 (.0077 C .0118) typ 2 millimeters (inches) *dimensions do not include mold flash. mold flash shall not exceed 0.150mm (.006") per side note: 1. controlling dimension: millimeters 2. dimensions are in recommended solder pad layout 3. drawing not to scale 0.45 t 0.05 0.65 bsc 4.50 t 0.10 6.60 t 0.10 1.05 t 0.10 2.74 (.108) 2.74 (.108) see note 4 4. recommended minimum pcb metal size for exposed pad attachment 6.40 (.252) bsc fe package 16-lead plastic tssop (4.4mm) (reference ltc dwg # 05-08-1663 rev i) exposed pad variation ba please refer to http://www.linear.com/designtools/packaging/ for the most recent package drawings. package description
lt3508 24 3508fd please refer to http://www.linear.com/designtools/packaging/ for the most recent package drawings. package description 4.00 0.10 (4 sides) note: 1. drawing proposed to be made a jedec package outline mo-220 variation (wggd-x)?to be approved 2. drawing not to scale 3. all dimensions are in millimeters 4. dimensions of exposed pad on bottom of package do not include mold flash. mold flash, if present, shall not exceed 0.15mm on any side, if present 5. exposed pad shall be solder plated 6. shaded area is only a reference for pin 1 location on the top and bottom of package pin 1 top mark (note 6) 0.40 0.10 24 23 1 2 bottom view?exposed pad 2.45 0.10 (4-sides) 0.75 0.05 r = 0.115 typ 0.25 0.05 0.50 bsc 0.200 ref 0.00 ? 0.05 (uf24) qfn 0105 recommended solder pad pitch and dimensions 0.70 0.05 0.25 0.05 0.50 bsc 2.45 0.05 (4 sides) 3.10 0.05 4.50 0.05 package outline pin 1 notch r = 0.20 typ or 0.35 45 chamfer uf package 24-lead plastic qfn (4mm 4mm) (reference ltc dwg # 05-08-1697)
lt3508 25 3508fd information furnished by linear technology corporation is believed to be accurate and reliable. however, no responsibility is assumed for its use. linear technology corporation makes no representa- tion that the interconnection of its circuits as described herein will not infringe on existing patent rights. revision history rev date description page number d 8/11 revised typical application drawing ta01a changed r t /sync pin name to rt/sync updated pin con? guration drawings revised exposed pad, v c1 , v c2 and v in1 pin descriptions in pin functions section made minor text edits in operation and applications information sections updated equations in input capacitor and shutdown and undervoltage lockout sections and revised figure 4 of applications information moved last paragraph of multiple inputs section to the soft-start section in applications information 1 1, 2, 6, 7, 8, 10, 17, 20, 21, 22, 26 2 6 8, 10 11, 13, 15 17 (revision history begins at rev d)
lt3508 26 3508fd linear technology corporation 1630 mccarthy blvd., milpitas, ca 95035-7417 (408) 432-1900 fax: (408) 434-0507 www.linear.com ? linear technology corporation 2007 lt 0811 rev d ? printed in usa related parts part number description comments lt1765 25v, 2.75a (i out ), 1.25mhz, high ef? ciency step-down dc/dc converter v in : 3v to 25v, v out(min) = 1.2v, i q = 1ma, s8, tssop16e packages lt1766 60v, 1.2a (i out ), 200khz, high ef? ciency step-down dc/dc converter v in : 5.5v to 60v, v out(min) = 1.2v, i q = 2.5ma, tssop16/tssop16e packages lt1767 25v, 1.2a (i out ), 1.25mhz, high ef? ciency step-down dc/dc converter v in : 3v to 25v, v out(min) = 1.2v, i q = 1ma, ms8, ms8e packages lt1940/lt1940l dual monolithic 1.4a, 1.1mhz step-down switching regulators v in : 3.6v to 25v, v out(min) = 1.25v, i q = 3.8ma, tssop16e packages ltc3407 dual 600ma, 1.5mhz, synchronous step-down regulator v in : 2.5v to 5.5v, v out(min) = 0.6v, i q = 40a, mse package lt3493 1.2a, 750khz step-down switching regulator in 2mm 3mm dfn v in : 3.6v to 36v, v out(min) = 0.78v, i q = 1.9ma, 2mm 3mm dfn package lt3501/lt3510 dual 3a/2a, 1.5mhz high ef? ciency step-down switching regulators v in : 3.6v to 25v, v out(min) = 0.8v, i q = 3.7ma, i sd < 10a, tssop20e package lt3506/lt3506a dual monolithic 1.6a, 1.1mhz step-down switching regulators v in : 3.6v to 25v, v out(min) = 0.8v, i q = 3.8ma, 16-lead dfn and 16-lead tssope packages ltc3701 two phase, dual, 500khz, constant frequency, current mode, high ef? ciency step-down dc/dc controller v in : 2.5v to 10v, v out(min) = 0.8v, i q = 460a, ssop-16 package ltc3736 dual two phase, no r sense ?, synchronous controller with output tracking v in : 2.75v to 9.8v, v out(min) = 0.6v, i q = 300a, 4mm 4mm qfn or ssop-24 packages ltc3737 dual two phase, no r sense dc/dc controller with output tracking v in : 2.75v to 9.8v, v out(min) = 0.6v, i q = 220a, 4mm 4mm qfn or ssop-24 packages typical application 5v, 1.8v output from pci express v in 12v boost2 lt3508 v in1 v in2 gnd 3508 ta05 rt/sync c7 330pf c5 47f c6 10f c1 4.7f c3 0.1f r9 40.2k r10 14.7k c4 0.1f r6 47k c9 100pf r5 43k r4 15.0k r8 33.2k c1 to c6: x5r or x7r d1, d2: mmsd4148 d3: diodes inc. b140 d4: diodes inc. b120 f sw = 1mhz r1 52.3k r7 100k r2 18.7k r3 10k l2 3.3h l1 6.8h d1 d2 v in2 3.3v d3 d4 power good out2 1.8v 1.4a out1 5v 0.9a c2 4.7f c8 0.047f c10 0.047f boost1 shdn sw2 sw1 fb2 fb1 v c2 pg1 v c1 track/ss1 pg2 track/ss2

▲Up To Search▲

Price & Availability of LT3508EFEPBF

	To Download LT3508EFEPBF Datasheet File
If you can't view the Datasheet, Please click here to try to view without PDF Reader .